将下列这些资料整理到：
CFI Flash， JEDEC Flash ，Parellel Flash, SPI Flash， Nand Flash，Nor Flash的区别和联系
http://hi.baidu.com/serial_story/blog/item/3f6ba1511c8b552d43a75b47.html
同时更新一下这里：
http://blog.163.com/againinput4@yeah/blog/static/122764271200962305331628/
先总结如下：
1.CFI是个协议，是Nor Flash硬件厂商设计Nor Flash的时候，可以设计出符合此协议的Nor Flash，然后对应的解析CFI协议的上层软件，就可以支持你的设备。
2.CFI协议是JEDEC组织所引入/认同的。所以可以理解为 JEDEC Flash= CFI Flash，且都只是针对Nor Flash而言的。
下面是找到的很多的相关资料：
1. 关于CFI的简介，可以参考Spansion的介绍：
http://www.spansion.com/Support/AppNotes/Quick_Guide_to_CFI_AN_02_e.pdf
”Common Flash Interface, or CFI, is a standard introduced by the Joint Electron Device Engineering Council
(JEDEC) to allow in-system or programmer reading of Flash device characteristics, which is equivalent to
having data sheet parameters located in the device. The JEDEC Solid State Technology Association defines
industry standards for semiconductor devices, with CFI being one of many. The CFI is used to standardize
Flash device characteristics and to define feature differences between various Flash manufacturers. For a
detailed definition of CFI, please refer to the JEDEC CFI publications JEP137 and JESD68.“
2. http://www.segger.com/cms/jflash.html
中也区分 CFI Flash 和 Nor Flash，说明CFI的确只是针对Parallel的Nor Flash来说的，因此与Parallel对应的是Serial的Nor，即SPI Nor Flash：
“
- CFI-compliant NOR flash (the combinations 18x, 2×8, 1×16, 2×16 are supported)
- most non-CFI compliant NOR flash devices (the combinations 18x, 2×8, 1×16, 2×16 are supported)
- SPI NOR-Flash
”
3. Wiki里面对CFI的解释，CFI是经过JEDEC组织认定的协议。
http://en.wikipedia.org/wiki/Common_Flash_Memory_Interface
”The Common Flash memory Interface (CFI) is an open standard jointly developed by AMD, Intel, Sharp and Fujitsu. AMD has sold its flash memory products division to Spansion. An overview about the specification is available at Spansion. It is an open standard, which means it is freely implementable by all flash memory vendors, and has been approved by the non-volatile memory subcommittee of JEDEC[1]. The idea behind was the interchangeability of current and future flash memory devices offered by different vendors. The developer is able to use one driver for different flash products by reading identifying information out of the flash chip itself.“
4. Wiki中关于Flash Memory的解释中，也提到了CFI协议，是为了统一Nor Flash的操作，使得同一套软件可以识别并操作不同厂商设计的Nor Flash：
http://en.wikipedia.org/wiki/Flash_memory
”The specific commands used to lock, unlock, program, or erase NOR memories differ for each manufacturer. To avoid needing unique driver software for every device made, a special set of Common Flash Memory Interface (CFI) commands allow the device to identify itself and its critical operating parameters.“
5.Nor Flash的历史，参考这里：
http://www.spansion.com/Products/Documents/Spansion_MirrorBit_SPI_MIO_backgrounder.pdf
”In order to contribute appreciably to lowering overall systems costs, manufactures must look past just the component to the entire system. As memory manufacturers continue to innovate and create smaller die sizes and smaller packages, only by lowering pin count can you start to affect the memory subsystem. For this reason, serial Flash memory is an attractive solution for a variety of applications. The serial interface offers several benefits over the parallel interface in reducing overall systems costs including microcontroller and chipset pin-count reduction, smaller and simpler printed circuit boards, and lower power consumption. As a result, serial Flash memory unit volume has grown by more than 400 percent since 2004 and has represented almost 50 percent of the low-density (1-megabit (Mb) to 16 Mb) NOR Flash market. Because of the lowest pin count, lowest package costs, and optimized testing capability, the unit cost for SPI
Flash memory is the lowest amongst the alternative Flash memories at similar densities which translates into lower system costs for end applications.
。。。
For design engineers, the move to reduce costs sometimes comes at the price of reduced performance. For applications that have switched from the parallel interface to standard serial interface, read performance of the memory declines by 50% to 70% (typical 90ns parallel Flash memory in byte or word mode, compared to the SPI Flash memory running at 50MHz in single I/O mode). The next generation of MirrorBit? SPI Flash memory is the Multiple I/O family. Multi I/O Flash memories will play an important role in expanding the applicability of SPI Flash memory to a broader array of applications due to its increased performance, while maintaining the lower cost benefits of the serial interface
“
简单说就是，最开始只有Parallel的Nor Flash，后来才开发出来serial的Nor Flash，即SPI接口的Nor Flash，由于SPI的阵脚数目少，所以使得整个系统可以做的更小，更简单，意味着系统更易稳定，更少的电路，因此是降低了整个系统的成本，因此2004年的时候，整个出货量，即卖出的数量，比之前增长了400%，而之后，就占据了低密度（1Mb-16Mb）的Nor Flash市场的半壁江山。
但是呢，SPI的pin脚是少了，但是性能比Parallel的Nor要下降了很多。因此后续又会有新的SPI的Nor Flash，即MirrorBIt Nor Flash，通过I/O复用实现更高的性能。这样的话，在性能与整个系统成本之间取舍，得到一个更好的结果。
上面PDF链接中，有性能比较的表格，此处不再赘述。
转载请注明：在路上 » [todo] add related meterial to CFI/JEDEC Nor Flash